1. Field of the Invention
The present invention relates to an apparatus and method for booting a controller. More particularly, the present invention relates to an apparatus and method for booting a coprocessor for use in a system comprised of a main processor and a coprocessor.
2. Description of the Related Art
Typically, in a system comprised of a main processor and a coprocessor, the main processor controls overall operations of the system, and the coprocessor controls a specific function upon receiving a control signal from the main processor. The aforementioned system has been widely used in mobile terminals having current hybrid functions. For example, in the case of a mobile terminal provided for processing current video signals, a main processor controls overall operations of a communication or mobile terminal, and a coprocessor performs the processing of video signals upon receiving a control signal from the main processor. The aforementioned mobile terminal can be provided with any number of devices, such as a mobile terminal for a camcorder, a PDA (Personal Digital Assistant), a VOD (Video On Demand) phone, and similar devices.
A representative example of the aforementioned system, including the main processor and the coprocessor, is shown in FIG. 1. The following detailed description will hereinafter be described with reference to FIG. 1 in which, the example of the aforementioned system is provided as a mobile terminal.
Referring to FIG. 1, the main processor 100 controls communication and overall operations of the mobile terminal. A first flash memory 110 is comprised of a NOR flash memory for storing boot and loader programs and main operation programs of the main processor 100. A second flash memory 120 is comprised of a NAND flash memory for storing large amounts of nonvolatile data, for example, content data, font data, bitmap data, phonebook data, and similar data.
The second flash memory 120 has a limited number of correction times associated with the same area, such that encounters with an unexpected error in a specified area results in an outcome wherein data cannot be recorded or stored any further in the second flash memory 120. Therefore, a flash file system is adapted to access data of the flash memory (i.e., 110 and 120). RAM (Random Access Memory) 130 can be adapted to function as a work memory for use in the main processor 100. Other peripheral devices 140 are comprised of devices operated by a control signal generated from the main processor 100. In this case, the peripheral devices 140 can be keypads, displays, RF (Radio Frequency) units, communication units, and similar devices.
Upon receiving a control signal from the main processor 100, the coprocessor 200 assumes direction of a specific function, and processes the specific function. An additional first flash memory 210 is comprised of a NOR flash memory for storing boot and loader programs and main operation programs of the coprocessor 200. An additional second flash memory 220 is comprised of a NAND flash memory for storing large amounts of nonvolatile data, for example, content data associated with functions of the coprocessor 200. RAM 230 can be adapted as a work memory of the coprocessor 200. Other peripheral devices 240 are comprised of devices operated by a control signal generated from the coprocessor 200. In this case, if the mobile terminal is a camcorder, the peripheral devices 240 can be devices such as multimedia codecs, cameras, displays (e.g., LCDs), and similar devices. Content data stored in the second flash memory 220 can then include video-processed and similar data. If the mobile terminal is a PDA terminal, substantially all the applications, other than a communication function, can be provided by the peripheral devices 240.
The first flash memories 110 and 210 each can be provided as a NOR flash memory. The second flash memories 120 and 220 can be provided as a NAND flash memory.
As stated above, the main processor 100 and the coprocessor 200 each include a memory unit comprised of NOR and NAND flash memories and RAMs. Therefore, the main processor 100 and the coprocessor 200 must each include the aforementioned memories, resulting in increased hardware installation space and increased production cost. Therefore, it is preferable for either one of the NOR and NAND flash memories to be removed.
The NOR flash memory is very expensive, and where it is configured in the form of a stable configuration, it can store boot and loader programs and flash file systems. The NAND flash memory has advantages in that it is relatively cheaper than the NOR flash memory, and has excellent capacity which is higher than that of the NOR flash memory. However, the NAND flash memory has a relatively-high probability of creating bad sectors in the memory, in which the memory stores content data for use in a corresponding device. Therefore, when storing the boot and loader programs and flash filter systems in the NAND flash memory, it is impossible to perform operations of an overall system if unexpected bad sectors occur in a specific area for storing the programs.
Accordingly, a need exists for an improved system for stably accessing the boot and loader programs and the flash file systems in devices wherein the costly NOR flash memory is removed.